The Capex Hike Is the Story: Why TSMC's $60 Billion Signal Is About Scarcity, Not Boom

Taiwan Semiconductor lifted its 2026 capital budget to $60-64 billion from $52-56 billion, a 15 percent mid-year raise that the market read as an AI demand endorsement. That reading has the causal arrow reversed. The capex hike is a scarcity signal, not a demand signal. When a monopoly foundry

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A silicon wafer covered in iridescent die patterns under warm amber cleanroom lighting, set against a dark industrial background.
TSMC has moved from meeting demand to rationing it. A 15 percent mid-year capex hike is the scarcity signal.

Taiwan Semiconductor Manufacturing Company reported record second-quarter results on Thursday and, more importantly, raised its 2026 capital budget to a range of $60 billion to $64 billion, up from the prior guidance of $52 billion to $56 billion. It lifted its full-year 2026 revenue growth outlook to slightly above 40 percent in U.S. dollar terms, from the prior "over 30 percent." Shares closed the regular session at $419.48 and then fell 1.55 percent in after-hours trading. The consensus interpretation, echoed across sell-side notes and the financial press, is that the print validates the AI capital-spending cycle. That interpretation reads the data with the causal arrow reversed. The capex hike is not a demand signal. It is a scarcity signal. And when a de facto monopoly foundry has to institutionalize a 15 percent mid-year step-up in structural spending to catch up to demand it already saw coming, the trade is not to buy TSMC. It is to reprice everything downstream of TSMC.

The central data point deserves a slower reading. TSMC entered 2026 with a capital budget of $38 billion to $42 billion. It raised that in April to $52 billion to $56 billion. It raised it again on Thursday to $60 billion to $64 billion. Two mid-year revisions in the same year, both upward, both driven by advanced-node capacity constraints, is not the profile of a company operating in a comfortable supply-demand equilibrium. On the earnings call, chief executive C.C. Wei framed the situation in terms that were unusually explicit for a foundry executive who normally speaks in guidance ranges.

"Our conviction in the multi-year AI megatrend remains very high," Wei told analysts. "AI related demand continues to be extremely robust." Pressed later on the gap between AI accelerator demand and TSMC's ability to supply advanced-node capacity, he said flatly: "the gap is very big."

Two years ago, Wei's script on capacity matched demand at each earnings call. That script has shifted. The framing has moved from "we are meeting demand" to "the gap is very big" and "the CapEx in the next three years will be even more significantly higher than the past three years." When the world's most important semiconductor manufacturer, whose forward visibility on advanced-node wafer orders is the tightest of any industrial company on the planet, describes a demand-supply gap in those terms, the market's job is to work out who pays for the mismatch. The answer is: everyone downstream.

The Morgan Stanley note that reframes the trade

The sell-side response on Friday morning was informative less for the target-price moves than for the specific mechanism analysts identified. Morgan Stanley, in a note picked up by TrendForce on Thursday, worked through the pass-through arithmetic in a way that clarifies the pricing power TSMC is now going to exercise.

"ASML's capacity allocation is expected to keep TSMC as its largest EUV customer," Morgan Stanley's semis team wrote, according to TrendForce's Thursday summary. The bank estimates "TSMC may need to spend roughly US$3 billion to reflect a 5% increase in equipment prices" while "another US$8 billion could be allocated toward equipment prepayments" to lock in ASML allocation ahead of competitors. The consequence, per the same note, is that Morgan Stanley "expects TSMC to raise leading-edge wafer prices by another 5% to 10% in 2027," with the "transition [potentially accelerating] as NVIDIA moves from Blackwell to Rubin, with Rubin shifting to a 3nm process."

Read that sequence as one unit. Roughly $3 billion of the capex hike is not new capacity. It is inflation-offset spending to buy the same tools TSMC would have bought anyway, at higher prices. Another $8 billion is essentially a bond posted to ASML to guarantee EUV allocation. Only after those two adjustments does the residual translate into net new productive capacity. Which means the "$60-64 billion capex" number understates the effective spending required to add a marginal wafer of N2 or N3 capacity, and it understates it by an amount roughly equal to the entire capex budget of Intel's foundry business in 2026. That is not a headline the sell-side is running with. It is, however, the correct read of what the incremental spending is buying.

Citi's model, in the same TrendForce compilation, extends the trajectory forward. Citi's analysts wrote that "TSMC's N2-family capacity is expected to grow at a CAGR of more than 70% from 2026 to 2028, while N3 capacity is also expanding rapidly to support demand for advanced AI chips," while projecting TSMC's capital expenditure will reach $77 billion in 2027 and $86 billion in 2028. GF Securities went further, projecting that TSMC's capex "could surge to US$90 billion by 2028." Goldman Sachs, per the same summary, is now modeling "a low- to mid-single-digit price increase for TSMC in 2027." These are not fringe estimates. They are the base case at every major sell-side desk. Compounded over three years, they describe a semiconductor supply chain in which the marginal AI accelerator die costs meaningfully more to manufacture in 2028 than it does today, in real terms, for reasons that are structural to the bottleneck and not cyclical.

Where the pricing power actually lands

The received framing is that TSMC's pricing power is captured by TSMC. The margin arithmetic on Thursday's call complicates that framing. Chief financial officer Wendell Huang guided third-quarter gross margin to 66 percent at the midpoint, down 170 basis points from the 67.7 percent Q2 print, and he identified the specific driver.

"We have just guided our third quarter gross margin to decrease by 1.7 percentage point to 66% at the midpoint," Huang said, "primarily as we expect the steep ramp-up of our 2-nanometer technology to dilute our gross margin by about 3-4 percentage points."

A 3-4 percentage-point structural dilution from N2, which will run through 2027 and into 2028 as the node ramps, is not offset by the 5-10 percent leading-edge price increases Morgan Stanley expects. It is roughly matched by them. Which means TSMC's steady-state gross margin through the peak AI capex cycle looks lower, not higher, than the 67.7 percent it just printed. The pricing power is real, but it flows through TSMC to ASML, to the equipment supply chain more broadly, and eventually to whichever hyperscaler or accelerator designer is furthest from having a fabrication alternative. That is not Nvidia. Nvidia has locked N3 for Rubin. It is the second tier of AI accelerator buyers, including Broadcom's ASIC customers, AMD's MI series, and any hyperscaler running custom silicon programs that assumed 2026-era wafer economics would extend. Those assumptions are now wrong.

The Arizona commitment as tell

Wei's other major disclosure on the call was the additional $100 billion Arizona commitment, bringing TSMC's total U.S. investment to $265 billion. The framing in the U.S. financial press treated this as a political story. It is a supply-chain story. Aletheia Capital, in a note also picked up by TrendForce, connected the pieces directly, writing that "the increase is partly driven by installation-related revenue," referring to the ASML capacity allocation that has been ratcheting up through 2026. TSMC is committing to a U.S. footprint at this scale because the marginal EUV tool arriving in 2027 and 2028 is going to Arizona, not Hsinchu, and it needs the physical footprint to absorb the allocation. This has a second-order implication that is under-appreciated. The Arizona ramp will drag on gross margin for years. Huang was explicit on the call that "our Q2 gross margin increased by 150 basis points sequentially to 67.7%, slightly ahead of our guidance, primarily due to cost improvement efforts and a slightly higher overall capacity utilization rate, partially offset by dilution from our overseas fabs." "Partially offset by dilution from our overseas fabs" is the phrase that will define TSMC's margin structure for the balance of the decade.

Our view

The trade is not TSMC. TSMC is fairly valued to modestly cheap on a five-year discounted cash flow at these growth and margin assumptions, but the incremental information from Thursday does not change that materially. The trade is the second-order repricing. Long the equipment supply chain, particularly ASML and, on a lag, Applied Materials and Lam Research, whose pricing power TSMC's capex hike has just publicly ratified. Long the AI-accelerator designers with locked N3 and N2 allocation, most importantly Nvidia, whose relative advantage over second-tier accelerator competitors just widened structurally. Short, or underweight, the second-tier AI hardware programs whose 2027 and 2028 unit economics were built on assumptions of foundry cost curves that the Morgan Stanley 5-10 percent price increase makes obsolete. And, on a longer horizon, watch the hyperscaler capital spending signals for the first crack. If a hyperscaler cuts its 2027 AI capex guidance in the next two quarters, it will not be because AI demand softened. It will be because the marginal accelerator die became too expensive to justify the marginal training run. That is the failure mode this capex hike sets up, and it is not priced.

The received frame of the AI supply chain, that costs come down and volumes go up as manufacturing scales, has been true at every prior semiconductor node transition. It is not true at this one. The bottleneck is EUV tool throughput. TSMC has just told the market it will spend $60 to $64 billion this year, and roughly $77 to $90 billion in 2028, to buy its way into as much EUV allocation as ASML can ship. Costs are not coming down. Volumes are being rationed at the top of the demand stack, and prices are going up for everyone below Nvidia. That is what "the gap is very big" means, and it is what a 15 percent mid-year capex raise is telling the market. It is a scarcity signal. It has been mispriced as a demand signal. The correction of that mispricing is where the return lives.

This note reflects the views of Solomon Grey Capital's Technology and AI infrastructure desk as of the date of publication and is provided for informational purposes only. It does not constitute investment advice, an offer, or a solicitation to buy or sell any security. Past performance is not indicative of future results.

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